1. Field of Invention
The present invention relates to digital signal interfaces, and in particular, to a low-power, logic signal level converter capable of receiving a logic signal from a circuit operating at a low power supply voltage and converting such signal to an output with a higher peak-to-peak signal swing for driving a system bus referenced to a higher power supply voltage.
2. Description of the Related Art
With the increasing density of very large scale integration (VLSI) circuits, corresponding increases in power requirements and dissipation have become of increasing concern. Larger power supplies become necessary, as well as more sophisticated heat sinking techniques, both of which add cost, complexity and weight to a system. Furthermore, increasingly dense VLSI circuits have allowed systems to be developed which are significantly smaller, and yet significantly more powerful, than their recent predecessors. This, in turn, allows such systems to become increasingly portable. However, such portability can be limited in the face of higher power requirements and dissipation. For example, in portable applications larger or more numerous batteries become necessary.
One technique which has been used with some success to address the power requirements of VLSI circuits while still allowing for a reasonable degree of portability has been the development of low voltage VLSI circuits. Many circuits have been developed which can operate at lower power, with lower power supply voltages. However, the need often arises for interfacing such low voltage systems to higher voltage systems, such as hard-wired connections to networks, computers or workstations. Accordingly, such low voltage systems require interfaces capable of converting their input and output signals, while still seeking to minimize power dissipation.
In such interfaces, the greater challenge is in realizing an output signal converter, e.g. a line driver capable of receiving a low voltage input logic signal and driving a signal bus line with a higher voltage logic signal. Conventional converter designs have required the use of multiple stages of buffering. (See e.g. A. Chandrakasan, A. Burstein and R. W. Brodersen, "A Low Power Chipset for Portable Multimedia Applications", ISSCC Digest of Technical Papers, February 1994, pp. 82-83.) However, this technique results in greater circuit complexity, higher power consumption and output signal delay.
Accordingly, it would be desirable to have a logic signal level converter capable of converting low voltage logic signals to higher voltage logic signals without introducing additional circuit complexity while minimizing signal delay and power consumption.